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FEDL63295A-02
1 Semiconductor ML63295A
GENERAL DESCRIPTION
This version: Jul. 2001 Previous version: Nov. 2000
4-Bit Microcontroller with Built-in 3072-Dot Matrix LCD Driver and Melody Circuit
The ML63295A is a CMOS 4-bit microcontroller that employs Oki's original CPU core nX-4/250. The ML63295A operates on a power supply voltage of 6 V. With built-in 3072-dot matrix LCD drivers (96 SEG. x 32 COM.), the ML63295A is suited for applications such as electronic dictionaries with an LCD.
FEATURES
* Extensive instruction set 439 instructions: Transfer, rotate, increment/decrement, arithmetic operations, compare, logic operations, mask operations, bit operations, ROM table reference, external memory transfer, stack operations, flag operations, jump, conditional branch, call/return, control * Wide variety of addressing modes Indirect addressing mode for 4 types of data memory with current bank register, extra bank register, HL register and XY register Data memory bank internal direct addressing mode * Processing speed 2 clocks per machine cycle, with most instructions executed in 1 machine cycle Minimum instruction execution time : 61 s (@ 32.768 kHz system clock) : 1 s (@ 2 MHz system clock) * Clock generation circuit Low-speed clock : Crystal oscillation or RC oscillation selected with mask option (30 kHz to 80 kHz) High-speed clock: Ceramic oscillation or RC oscillation selected with software (2 MHz max) * Program memory space 32 K words Basic instruction length is 16 bits/1word. * Data memory space 2048 nibbles * External data memory space 64 Kbytes (expandable furthermore by using the I/O ports) * Stack level Call stack level Register stack level
: 16 levels : 16 levels
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* Ports Input ports: Selectable as input pull-up resistor/input pull-down resistor/high impedance input. Output ports: Selectable as P-channel open drain output/N-channel open drain output/high-impedance output/CMOS output. I/O ports: Selectable as input pull-up resistor/input pull-down resistor/high impedance input. Selectable as P-channel open drain output/N-channel open drain output/high-impedance output/ CMOS output. Can be interfaced with external peripherals that use a different power supply than this device uses. Number of ports: Input port : 2 ports x 4 bits Output port : 6 ports x 4 bits Input-output port : 6 ports x 4 bits * Melody output Melody frequency Tone length Tempo Melody data Buzzer driver signal output * LCD driver Number of segments Duty Bias Frame frequency Contrast Display modes
: 529 Hz to 2979 Hz : 63 varieties : 15 varieties : Stored in program memory : 4 kHz
: 3072 Max. (96 SEG. x 32 COM.) : Selectable as 1/2, 1/4, 1/6, 1/8, 1/10, 1/12, 1/14, 1/16, 1/18, 1/20, 1/22, 1/24, 1/26, 1/28, 1/30, or 1/32 duty : Selectable as 1/5 or 1/6 bias (regulator built-in) : ex. 64 Hz (at 1/32 duty), 128 Hz (at 1/16 duty), 256 Hz (at 1/8 duty), 512 Hz (at 1/4 duty), 1024 Hz (at 1/2 duty) : 16 levels adjustable : Selectable as all-ON mode/all-OFF mode/power down mode/normal display mode : (8 bits) x (8 bits) Product (16 bits) : (16 bits)/(8 bits) Quotient (16 bits), Remainder (8 bits)
* Multiplier/divider circuit Multiplier Divider
* System reset function System reset through RESET pin System reset by power-on detection System reset by low-speed oscillation halt * Battery check Low-voltage supply check The value of the judgment voltage is selected by the software (by setting the LD1 and LD0 bits of BLDCON).
LD1 1 1 LD0 0 1 Judgment voltage (V) 4.5 0.1 5.1 0.1 Remarks Ta = 25C Ta = 25C
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* Timers and Counter 8-bit timer
Watchdog timer 100 Hz timer 15-bit time-base counter
:2 Selectable as auto-reload mode/clock frequency measurement mode :1 :1 Measurable in steps of 1/100 sec. :1 1, 2, 4, 8, 16, 32, 64, and 128 Hz signals can be read
* Serial port Mode UART communication speed Clock frequency in synchronous mode Data length * Shift register Shift clock Data length * Interrupt factors External interrupt Internal interrupt * Operating temperature * Power supply voltage
: Selectable as UART mode, synchronous mode : 1200 bps, 2400 bps, 4800 bps, 9600 bps : Internal clock mode (32.768 kHz), External clock frequency : 5 to 8 bits : 1 x or 1/2 x system clock, external clock : 8 bits
:5 : 12 : -20 to +70C : 3.5 to 7.2 V
* Package: Chip (212 pads) : (Product name: ML63295A-XXXWA) 240-pin plastic QFP (QFP240-P-3232-0.50-BK4) : (Product name: ML63295A-xxxGA) ....under consideration xxx indicates a code number.
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BLOCK DIAGRAM
Asterisks (*) indicate the port secondary functions. Signal names enclosed by chain lines ( ) indicate interface signals of the VDDI power supply system. Signal names enclosed by indicates signals of the VDDE power supply system.
CPU core TIMING CONT. SP RSP STACK CAL.S:16-level REG.S:16-level ALU MIE INSTRUCTION DECODER IR INT 2 CBR EBR H X nX-4/250 L Y C RA A G Z BUS CONT. PC ROM 32 KW
EXTMEM 64 KB
D0-7* A0-15*
RD* W R*
RAM 2048N
TIMER 8 bit (2ch)
T2CK* T3CK* RXC* TXC* RXD* TXD* SCLK* SIN* SOUT* MD MDB P0.0-P0.3 P1.0-P1.3 P2.0-P2.3 P3.0-P3.3 P4.0-P4.3 P5.0-P5.3 P6.0-P6.3 P7.0-P7.3
INT
INT 2 SIO INT
MULDIV RESET RST TBC DATA BUS INT TST1 TST2 TST 4
1 INT 1
SFT
MELODY INT 1 INPUT PORT
XT0 XT1 OSC0 OSC1 OSC INT 1 INT V DDX1 V DDX2 V DDX3 V DDX4 C1 C2 V DD1 V DD2 V DD3 V DD4 V DD5 V DD6 V DD V DDL V DDE 1
BLD
100HzTC
OUTPUT W DT
INT BIAS 4 I/O PORT
P8.0-P8.3 P9.0-P9.3 PA.0-PA.3 PB.0-PB.3 PC.0-PC.3 PE.0-PE.3 LCD & DSPR COM1-COM32 SEG0-SEG95 V DDI V SS
VR
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PIN CONFIGURATION (TOP VIEW)
(NC) VDDI MDB MD (NC) RESET XT0 XT1 TST2 TST1 (NC) OSC0 OSC1 VDDE VDD VDDL VDD (NC) (NC) (NC) (NC) C2 C1 VDDX4 (NC) VDDX3 VDDX2 VDDX1 (NC) VDD6 VDD5 VDD4 (NC) VDD3 VDD2 VDD1 VSS COM32 COM31 COM30 COM29 COM28 COM27 COM26 COM25 COM24 COM23 COM22 COM21 COM20 COM19 COM18 COM17 SEG95 SEG94 SEG93 SEG92 SEG91 SEG90 (NC) 180 179 178 177 176 175 174 173 172 171 170 169 168 167 166 165 164 163 162 161 160 159 158 157 156 155 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121
(NC) (NC) (NC) (NC) PE.3 PE.2 PE.1 PE.0 PC.3 PC.2 PC.1 PC.0 PB.3 PB.2 PB.1 PB.0 PA.3 PA.2 PA.1 PA.0 P9.3 P9.2 P9.1 P9.0 P8.3 P8.2 P8.1 P8.0 P7.3 P7.2 P7.1 P7.0 P6.3 P6.2 P6.1 P6.0 P5.3 P5.2 P5.1 P5.0 P4.3 P4.2 P4.1 P4.0 P3.3 P3.2 P3.1 P3.0 P2.3 P2.2 P2.1 P2.0 P1.3 P1.2 P1.1 P1.0 P0.3 (NC) (NC) (NC)
181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240
120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61
(NC) (NC) (NC) SEG89 SEG88 SEG87 SEG86 SEG85 SEG84 SEG83 SEG82 SEG81 SEG80 SEG79 SEG78 SEG77 SEG76 SEG75 SEG74 SEG73 SEG72 SEG71 SEG70 SEG69 SEG68 SEG67 SEG66 SEG65 SEG64 SEG63 SEG62 SEG61 SEG60 SEG59 SEG58 SEG57 SEG56 SEG55 SEG54 SEG53 SEG52 SEG51 SEG50 SEG49 SEG48 SEG47 SEG46 SEG45 SEG44 SEG43 SEG42 SEG41 SEG40 SEG39 SEG38 SEG37 SEG36 (NC) (NC) (NC)
Note: Pins marked as (NC) are no-connection pins which are left open.
(NC) (NC) P0.2 P0.1 P0.0 VSS COM1 COM2 COM3 COM4 COM5 COM6 COM7 COM8 COM9 COM10 COM11 COM12 COM13 COM14 COM15 COM16 SEG0 SEG1 SEG2 SEG3 SEG4 SEG5 SEG6 SEG7 SEG8 SEG9 SEG10 SEG11 SEG12 SEG13 SEG14 SEG15 SEG16 SEG17 SEG18 SEG19 SEG20 SEG21 SEG22 SEG23 SEG24 SEG25 SEG26 SEG27 SEG28 SEG29 SEG30 SEG31 SEG32 SEG33 SEG34 SEG35 (NC) (NC)
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60
240-Pin Plastic QFP (GA:QFP240-P-3232-0.50-BK4)
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PAD CONFIGURATION
Pad Layout
163 SEG89 162 SEG88 161 SEG87 160 SEG86 159 SEG85 158 SEG84 157 SEG83 156 SEG82 155 SEG81 154 SEG80 153 SEG79 152 SEG78 151 SEG77 150 SEG76 149 SEG75 148 SEG74 147 SEG73 146 SEG72 145 SEG71 144 SEG70 143 SEG69 142 SEG68 141 SEG67 140 SEG66 139 SEG65 138 SEG64 137 SEG63 136 SEG62 135 SEG61 134 SEG60 133 SEG59 132 SEG58 131 SEG57 130 SEG56 129 SEG55 128 SEG54 127 SEG53 126 SEG52 125 SEG51 124 SEG50 123 SEG49 122 SEG48 121 SEG47 120 SEG46 119 SEG45 118 SEG44 117 SEG43 116 SEG42 115 SEG41 114 SEG40 113 SEG39 112 SEG38 111 SEG37 110 SEG36
SEG90 164 SEG91 165 SEG92 166 SEG93 167 SEG94 168 SEG95 169 COM17 170 COM18 171 COM19 172 COM20173 COM21 174 COM22 175 COM23 176 COM24 177 COM25 178 COM26 179 COM27 180 COM28 181 COM29 182 COM30 183 COM31 184 COM32 185 VSS 186 VDD1 187 VDD2 188 VDD3 189 VDD4 190 VDD5 191 VDD6 192 VDDX1 193 VDDX2 194 VDDX3 195 VDDX4 196 C1 197 C2 198 VDD 199 VDDL 200 VDD 201 VDDE 202 OSC1 203 OSC0 204 TST1 205 TST2 206 XT1 207 XT0 208 RESET 209 MD 210 MDB 211 VDDI 212
Y
( 0,0 )
X
109 108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54
SEG35 SEG34 SEG33 SEG32 SEG31 SEG30 SEG29 SEG28 SEG27 SEG26 SEG25 SEG24 SEG23 SEG22 SEG21 SEG20 SEG19 SEG18 SEG17 SEG16 SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 SEG3 SEG2 SEG1 SEG0 COM16 COM15 COM14 COM13 COM12 COM11 COM10 COM9 COM8 COM7 COM6 COM5 COM4 COM3 COM2 COM1 VSS P0.0 P0.1 P0.2
Chip size Chip thickness Coordinate origin Pad hole size Pad size Minimum pad pitch
Note: The chip substrate voltage is VSS.
PE.3 PE.2 PE.1 PE.0 PC.3 PC.2 PC.1 PC.0 PB.3 PB.2 PB.1 PB.0 PA.3 PA.2 PA.1 PA.0 P9.3 P9.2 P9.1 P9.0 P8.3 P8.2 P8.1 P8.0 P7.3 P7.2 P7.1 P7.0 P6.3 P6.2 P6.1 P6.0 P5.3 P5.2 P5.1 P5.0 P4.3 P4.2 P4.1 P4.0 P3.3 P3.2 P3.1 P3.0 P2.3 P2.2 P2.1 P2.0 P1.3 P1.2 P1.1 P1.0 P0.3
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53
: 8.25 mm x 8.20 mm : 350 m (280 m: available as required) : center of chip : 100 m x 100 m : 110 m x 110 m : 120 m
ML63295A
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Pad Coordinates
Center of chip: X = 0, Y = 0 Pad No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 Pad Name PE.3 PE.2 PE.1 PE.0 PC.3 PC.2 PC.1 PC.0 PB.3 PB.2 PB.1 PB.0 PA.3 PA.2 PA.1 PA.0 P9.3 P9.2 P9.1 P9.0 P8.3 P8.2 P8.1 P8.0 P7.3 P7.2 P7.1 P7.0 P6.3 P6.2 P6.1 P6.0 P5.3 P5.2 P5.1 P5.0 P4.3 P4.2 P4.1 X (m) -3138 -3018 -2898 -2778 -2658 -2538 -2418 -2298 -2178 -2058 -1938 -1818 -1698 -1578 -1458 -1338 -1218 -1098 -978 -858 -738 -618 -498 -378 -258 -138 -18 102 222 342 462 582 702 822 942 1062 1182 1302 1422 Y (m) -3905 -3905 -3905 -3905 -3905 -3905 -3905 -3905 -3905 -3905 -3905 -3905 -3905 -3905 -3905 -3905 -3905 -3905 -3905 -3905 -3905 -3905 -3905 -3905 -3905 -3905 -3905 -3905 -3905 -3905 -3905 -3905 -3905 -3905 -3905 -3905 -3905 -3905 -3905 Pad No. 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 Pad Name P4.0 P3.3 P3.2 P3.1 P3.0 P2.3 P2.2 P2.1 P2.0 P1.3 P1.2 P1.1 P1.0 P0.3 P0.2 P0.1 P0.0 VSS COM1 COM2 COM3 COM4 COM5 COM6 COM7 COM8 COM9 COM10 COM11 COM12 COM13 COM14 COM15 COM16 SEG0 SEG1 SEG2 SEG3 SEG4 X (m) 1542 1662 1782 1902 2022 2142 2262 2382 2502 2622 2742 2862 2982 3102 3965 3965 3965 3965 3965 3965 3965 3965 3965 3965 3965 3965 3965 3965 3965 3965 3965 3965 3965 3965 3965 3965 3965 3965 3965 Y (m) -3905 -3905 -3905 -3905 -3905 -3905 -3905 -3905 -3905 -3905 -3905 -3905 -3905 -3905 -3281 -3161 -3041 -2907 -2766 -2646 -2526 -2406 -2286 -2166 -2046 -1926 -1806 -1686 -1566 -1446 -1326 -1206 -1086 -966 -846 -726 -606 -486 -366
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Center of chip: X = 0, Y = 0 Pad No. 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 Pad Name SEG5 SEG6 SEG7 SEG8 SEG9 SEG10 SEG11 SEG12 SEG13 SEG14 SEG15 SEG16 SEG17 SEG18 SEG19 SEG20 SEG21 SEG22 SEG23 SEG24 SEG25 SEG26 SEG27 SEG28 SEG29 SEG30 SEG31 SEG32 SEG33 SEG34 SEG35 SEG36 SEG37 SEG38 SEG39 SEG40 SEG41 SEG42 SEG43 X (m) 3965 3965 3965 3965 3965 3965 3965 3965 3965 3965 3965 3965 3965 3965 3965 3965 3965 3965 3965 3965 3965 3965 3965 3965 3965 3965 3965 3965 3965 3965 3965 3185 3065 2945 2825 2705 2585 2465 2345 Y (m) -246 -126 -6 114 234 354 474 594 714 834 954 1074 1194 1314 1434 1554 1674 1794 1914 2034 2154 2274 2394 2514 2634 2754 2874 2994 3114 3234 3354 3905 3905 3905 3905 3905 3905 3905 3905 Pad No. 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 Pad Name SEG44 SEG45 SEG46 SEG47 SEG48 SEG49 SEG50 SEG51 SEG52 SEG53 SEG54 SEG55 SEG56 SEG57 SEG58 SEG59 SEG60 SEG61 SEG62 SEG63 SEG64 SEG65 SEG66 SEG67 SEG68 SEG69 SEG70 SEG71 SEG72 SEG73 SEG74 SEG75 SEG76 SEG77 SEG78 SEG79 SEG80 SEG81 SEG82 X (m) 2225 2105 1985 1865 1745 1625 1505 1385 1265 1145 1025 905 785 665 545 425 305 185 65 -55 -175 -295 -415 -535 -655 -775 -895 -1015 -1135 -1255 -1375 -1495 -1615 -1735 -1855 -1975 -2095 -2215 -2335 Y (m) 3905 3905 3905 3905 3905 3905 3905 3905 3905 3905 3905 3905 3905 3905 3905 3905 3905 3905 3905 3905 3905 3905 3905 3905 3905 3905 3905 3905 3905 3905 3905 3905 3905 3905 3905 3905 3905 3905 3905
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Center of chip: X = 0, Y = 0 Pad No. 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 Pad Name SEG83 SEG84 SEG85 SEG86 SEG87 SEG88 SEG89 SEG90 SEG91 SEG92 SEG93 SEG94 SEG95 COM17 COM18 COM19 COM20 COM21 COM22 COM23 COM24 COM25 COM26 COM27 COM28 COM29 COM30 COM31 X (m) -2455 -2575 -2695 -2815 -2935 -3055 -3175 -3965 -3965 -3965 -3965 -3965 -3965 -3965 -3965 -3965 -3965 -3965 -3965 -3965 -3965 -3965 -3965 -3965 -3965 -3965 -3965 -3965 Y (m) 3905 3905 3905 3905 3905 3905 3905 3432 3312 3192 3072 2952 2832 2712 2592 2472 2352 2232 2112 1992 1872 1752 1632 1512 1392 1272 1152 1032 Pad No. 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 Pad Name COM32 VSS VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDDX1 VDDX2 VDDX3 VDDX4 C1 C2 VDD VDDL VDD VDDE OSC1 OSC0 TST1 TST2 XT1 XT0 RESET MD MDB VDDI X (m) -3965 -3965 -3965 -3965 -3965 -3965 -3965 -3965 -3965 -3965 -3965 -3965 -3965 -3965 -3965 -3965 -3965 -3965 -3965 -3965 -3965 -3965 -3965 -3965 -3965 -3965 -3965 -3965 Y (m) 912 730 580 430 280 130 -20 -170 -320 -470 -620 -770 -920 -1070 -1220 -1370 -1520 -1670 -1924 -2074 -2268 -2388 -2593 -2743 -2912 -3120 -3240 -3392
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PIN DESCRIPTIONS
The basic functions of each pin of the ML63295A are described in Table 1. A symbol with a slash "/" denotes a pin that has a secondary function. Refer to Table 2 for secondary functions. For type, "--" denotes a power supply pin, "I" an input pin, "O" an output pin, and "I/O" an input-output pin. Table 1 Pin Descriptions (Basic Functions)
Function Symbol VDD VSS VDD1 VDD2 VDD4 VDD5 VDD6 VDDX1 VDD3 VDDX4 Power Supply C1 C2 VDDX2 VDDX3 VDDI Pin No. 164, 166 6, 144 145 146 149 150 151 153 147 157 158 159 154 155 179 Pad No. 199, 201 57, 186 187 188 190 191 192 193 189 -- 196 197 198 194 195 212 -- Positive power supply pin for external interface (Power supply for input, output, and input-output ports) Positive power supply pin for internal logic (internally generated): A capacitor (0.1 F) should be connected between this pin and VSS. Constant voltage output pin: A capacitor (1.0 F) should be connected between this pin and VSS. Low-speed clock oscillation pins: An option for using crystal oscillation or RC oscillation is chosen by the mask option. If the crystal oscillation is chosen, a crystal should be connected between XT0 and XT1, and capacitor (CG) should be connected between XT0 and VSS. If the RC oscillation is chosen, external oscillation resistor (ROSL) should be connected between XT0 and XT1. -- -- -- Positive power supply for low-speed oscillation. Power supply pins for LCD bias voltage generation: Capacitors (1.0 F) should be connected between these pins and VSS. Capacitor connection pins for LCD bias voltage generation: A capacitor (1.0 F) should be connected between C1 and C2, and between VDDX2 and VDDX3. -- Type -- -- Description Positive power supply pin Negative power supply pin Power supply pins for LCD bias voltage (internally generated): Capacitors (1.0 F) should be connected between these pins and VSS.
VDDL
165
200
--
VDDE
167
202
--
XT0 Oscillation XT1
174
208
I
173
207
O
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Table 1 Pin Descriptions (Basic Functions) (continued)
Function Symbol OSC0 Oscillation OSC1 TST1 Test TST2 172 206 I 168 171 203 205 O I Pin No. 169 Pad No. 204 Type I Description High-speed clock oscillation pins: A ceramic resonator and capacitors (CL0, CL1) or external oscillation resistor (ROSH) should be connected to these pins. Input pins for testing. A pull-down resistor is internally connected to these pins. System reset input pin. Setting this pin to "H" level puts this device into a reset state. Then, setting this pin to "L" level starts executing an instruction from address 0000H. A pull-down resistor is internally connected to this pin. Melody output pin (non-inverted output) Melody output pin (inverted output)
Reset
RESET
175
209
I
Melody
MD MDB
177 178
210 211
O O
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Table 1 Pin Descriptions (Basic Functions) (continued)
Function Symbol P0.0/INT5 P0.1/INT5 P0.2/INT5 P0.3/INT5 P1.0/INT5 P1.1/INT5 P1.2/INT5 P1.3/INT5 P2.0 P2.1 P2.2 P2.3 P3.0 P3.1 P3.2 P3.3 P4.0/A0 P4.1/A1 P4.2/A2 Port P4.3/A3 P5.0/A4 P5.1/A5 P5.2/A6 P5.3/A7 P6.0/A8 P6.1/A9 P6.2/A10 P6.3/A11 P7.0/A12 P7.1/A13 P7.2/A14 P7.3/A15 P8.0/RD P8.1/WR P8.2 P8.3/INT4 P9.0/D0 P9.1/D1 P9.2/D2 P9.3/D3 Pin No. 5 4 3 237 236 235 234 233 232 231 230 229 228 227 226 225 224 223 222 221 220 219 218 217 216 215 214 213 212 211 210 209 208 207 206 205 204 203 202 201 Pad No. 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 I/O I/O 4-bit input-output ports: In input mode, pull-up resistor input, pull-down resistor input, or high-impedance input is selectable for each bit. In output mode, P-channel open drain output, N-channel open drain output, CMOS output, or high-impedance output is selectable for each bit. O O O O O O 4-bit output ports: P-channel open drain output, N-channel open drain output, CMOS output, or high-impedance output is selectable for each bit. I I Type 4-bit input ports: Pull-up resistor input, pull-down resistor input, or high-impedance input is selectable for each bit. Description
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Table 1 Pin Descriptions (Basic Functions) (continued)
Function Symbol PA.0/D4 PA.1/D5 PA.2/D6 PA.3/D7 PB.0/INT0 PB.1/INT0 PB.2/INT0/ T2CK PB.3/INT0/ T3CK PC.0/INT1/ RXD Port PC.1/INT1/ TXC PC.2/INT1/ RXC PC.3/INT1/ TXD PE.0/SIN PE.1/SOUT PE.2/SCLK PE.3/INT2 Pin No. 200 199 198 197 196 195 194 193 192 191 190 189 188 187 186 185 Pad No. 16 15 14 13 12 11 10 9 8 7 I/O 6 5 4 3 I/O 2 1 I/O I/O Type Description 4-bit input-output ports: In input mode, pull-up resistor input, pulldown resistor input, or high-impedance input is selectable for each bit. In output mode, P-channel open drain output, N-channel open drain output, CMOS output, or high-impedance output is selectable for each bit.
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Table 1 Pin Descriptions (Basic Functions) (continued)
Function Symbol COM1 COM2 COM3 COM4 COM5 COM6 COM7 COM8 COM9 COM10 COM11 COM12 COM13 COM14 COM15 LCD COM16 COM17 COM18 COM19 COM20 COM21 COM22 COM23 COM24 COM25 COM26 COM27 COM28 COM29 COM30 COM31 COM32 Pin No. 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 Pad No. 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 O Type Description LCD common signal output pins
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Table 1 Pin Descriptions (Basic Functions) (continued)
Function Symbol SEG0 SEG1 SEG2 SEG3 SEG4 SEG5 SEG6 SEG7 SEG8 SEG9 SEG10 SEG11 SEG12 SEG13 SEG14 SEG15 SEG16 SEG17 SEG18 SEG19 SEG20 SEG21 SEG22 SEG23 SEG24 SEG25 SEG26 SEG27 SEG28 SEG29 SEG30 SEG31 SEG32 SEG33 SEG34 SEG35 SEG36 SEG37 SEG38 SEG39 SEG40 SEG41 SEG42 SEG43 SEG44 SEG45 SEG46 Pin No. 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 64 65 66 67 68 69 70 71 72 73 74 Pad No. 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 Type Description LCD segment signal output pins
LCD
O
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ML63295A
Table 1 Pin Descriptions (Basic Functions) (continued)
Function Symbol SEG47 SEG48 SEG49 SEG50 SEG51 SEG52 SEG53 SEG54 SEG55 SEG56 SEG57 SEG58 SEG59 SEG60 SEG61 SEG62 SEG63 SEG64 SEG65 SEG66 SEG67 SEG68 SEG69 SEG70 SEG71 SEG72 SEG73 SEG74 SEG75 SEG76 SEG77 SEG78 SEG79 SEG80 SEG81 SEG82 SEG83 SEG84 SEG85 SEG86 SEG87 SEG88 SEG89 SEG90 SEG91 SEG92 SEG93 SEG94 SEG95 Pin No. 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 122 123 124 125 126 127 Pad No. 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 Type Description LCD segment signal output pins
LCD
O
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ML63295A
Table 2 shows the secondary functions of each pin of the ML63295A. Table 2 Pin Descriptions (Secondary Functions)
Function Symbol PB.0/INT0 PB.1/INT0 PB.2/INT0 PB.3/INT0 PC.0/INT1 PC.1/INT1 PC.2/INT1 PC.3/INT1 PE.3/INT2 Pin No. 196 195 194 193 192 191 190 189 185 Pad No. 12 11 10 9 8 7 6 5 1 I I I Type Description External 0 interrupt input pins The change of input signal level causes an interrupt to occur. The Port B Interrupt Enable register (PBIE) enables or disables an interrupt for each bit. External 1 interrupt input pins The change of input signal level causes an interrupt to occur. The Port C Interrupt Enable register (PCIE) enables or disables an interrupt for each bit. External 2 interrupt input pin External Interrupt The change of input signal level causes an interrupt to occur. External 4 interrupt input pin P8.3/INT4 P0.0/INT5 P0.1/INT5 P0.2/INT5 P0.3/INT5 P1.0/INT5 P1.1/INT5 P1.2/INT5 P1.3/INT5 Timer PB.2/T2CK PB.3/T3CK 205 5 4 3 237 236 235 234 233 194 193 21 56 55 54 53 52 51 50 49 10 9 I I External clock input pin for timer 2 External clock input pin for timer 3 I I The change of input signal level causes an interrupt to occur. External 5 interrupt input pins The change of input signal level causes an interrupt to occur. The Port 0 Interrupt Enable register (P0IE) and Port 1 Interrupt Enable register (P1IE) enable or disable an interrupt for each bit.
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Table 2 Pin Descriptions (Secondary Functions) (continued)
Function Symbol PC.0/RXD Pin No. 192 Pad No. 8 Type I Description Serial port receive data input pin Sync serial port clock input-output pin Transmit clock output when this device is used as a master processor. Transmit clock input when this device is used as a slave processor. Sync serial port clock input-output pin Receive clock output when this device is used as a master processor. Receive clock input when this device is used as a slave processor. Serial port transmit data output pin Shift register receive data input pin Shift register transmit data output pin Shift register clock input-output pin. Clock output when this device is used as a master processor. Clock input when this device is used as a slave processor. Address output bus for external memory
PC.1/TXC Serial Port PC.2/RXC
191
7
I/O
190
6
I/O
PC.3/TXD PE.0/SIN PE.1/SOUT Shift Register
189 188 187
5 4 3
O I O
PE.2/SCLK
186
2
I/O
External Memory
P4.0/A0 P4.1/A1 P4.2/A2 P4.3/A3 P5.0/A4 P5.1/A5 P5.2/A6 P5.3/A7 P6.0/A8 P6.1/A9 P6.2/A10 P6.3/A11 P7.0/A12 P7.1/A13 P7.2/A14 P7.3/A15 P9.0/D0 P9.1/D1 P9.2/D2 P9.3/D3 PA.0/D4 PA.1/D5 PA.2/D6 PA.3/D7 P8.0/RD P8.1/WR
224 223 222 221 220 219 218 217 216 215 214 213 212 211 210 209 204 203 202 201 200 199 198 197 208 207
40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 20 19 18 17 16 15 14 13 24 23
O
Data bus for external memory
I/O
O O
Read signal output pin for external memory (negative logic) Write signal output pin for external memory (negative logic)
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ML63295A
ABSOLUTE MAXIMUM RATINGS
(VSS = 0 V) Parameter Power Supply Voltage 1 Power Supply Voltage 2 Power Supply Voltage 3 Power Supply Voltage 4 Power Supply Voltage 5 Power Supply Voltage 6 Power Supply Voltage 7 Power Supply Voltage 8 Power Supply Voltage 9 Power Supply Voltage 10 Power Supply Voltage 11 Power Supply Voltage 12 Input Voltage 1 Input Voltage 2 Output Voltage 1 Output Voltage 2 Output Voltage 3 Output Voltage 4 Output Voltage 5 Output Voltage 6 Output Voltage 7 Output Voltage 8 Output Voltage 9 Output Voltage 10 Output Voltage 11 Storage Temperature Symbol VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDDX1 VDDX4 VDD VDDI VDDL VDDE VIN1 VIN2 VOUT1 VOUT2 VOUT3 VOUT4 VOUT5 VOUT6 VOUT7 VOUT8 VOUT11 VOUT12 VOUT13 TSTG Condition Ta = 25C Ta = 25C Ta = 25C Ta = 25C Ta = 25C Ta = 25C Ta = 25C Ta = 25C Ta = 25C Ta = 25C Ta = 25C Ta = 25C VDD input, Ta = 25C VDDI input, Ta = 25C VDD1 output, Ta = 25C VDD2 output, Ta = 25C VDD3 output, Ta = 25C VDD4 output, Ta = 25C VDD5 output, Ta = 25C VDD6 output, Ta = 25C VDDX1 output, Ta = 25C VDDX4 output, Ta = 25C VDD output, Ta = 25C VDDI output, Ta = 25C VDDE output, Ta = 25C -- Rating -0.3 to +1.5 -0.3 to +2.5 -0.3 to +6.5 -0.3 to +4.5 -0.3 to +5.5 -0.3 to +6.5 -0.3 to +2.0 -0.3 to +6.5 -0.3 to +7.5 -0.3 to +6.0 -0.3 to +6.0 -0.3 to +6.0 -0.3 to VDD + 0.3 -0.3 to VDDI + 0.3 -0.3 to VDD1 + 0.3 -0.3 to VDD2 + 0.3 -0.3 to VDD3 + 0.3 -0.3 to VDD4 + 0.3 -0.3 to VDD5 + 0.3 -0.3 to VDD6 + 0.3 -0.3 to VDDX1 + 0.3 -0.3 to VDDX4 + 0.3 -0.3 to VDD + 0.3 -0.3 to VDDI + 0.3 -0.3 to VDDE + 0.3 -55 to +150 Unit V V V V V V V V V V V V V V V V V V V V V V V V V C
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ML63295A
RECOMMENDED OPERATING CONDITIONS
(VSS = 0 V) Parameter Operating Temperature Operating Voltage Crystal Oscillation Frequency Low-speed RC Oscillation Frequency Ceramic Oscillation Frequency High-speed RC Oscillation Frequency Symbol TOP VDD VDDI fXT fROSL Condition -- -- -- CG = 5 to 25 pF ROSL = 1.5 M ROSL = 700 k ROSL = 500 k fCM VDD = 3.5 to 7.2 V ROSH = 100 k fROSH VDD = 3.5 to 7.2 V ROSH = 75 k ROSH = 51 k ROSH = 30 k Range -20 to +70 3.5 to 7.2 1.8 to 5.5 32.768 to 76.8 32 k 30% 60 k 30% 80 k 30% 200 k to 2 M 700 k 30% 1 M 30% 1.35 M 30% 2 M 30% Hz Hz Hz Unit C V V kHz
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Typical characteristics of low-speed RC oscillation
(VDD = 6.0 V, VDDI = 3.0 V) Reference data 1000
fROSL [kHz] 100 10 100
1000 ROSL [k]
10000
Typical characteristics of high-speed RC oscillation
(VDD = 6.0 V, VDDI = 3.0 V) Reference data 10000 fROSH[kHz] 1000
100 10
100 ROSH [k]
1000
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ELECTRICAL CHARACTERISTICS
DC Characteristics (1)
(VDD = 3.5 to 7.2 V, VDDI = 1.8 to 5.5 V, VSS = 0 V, Ta = -20 to +70C unless otherwise specified) Parameter VDDE Voltage VDDE Voltage Temperature Deviation Symbol VDDE VDDE Condition IOUT = 0 to 15 mA, Ta = 25C -- High-speed clock oscillation stopped VDDL Voltage VDDL During operation at high-speed clock oscillation (VDD = 3.5 to 7.2 V) Crystal Oscillation Start Voltage Crystal Oscillation Hold Voltage Crystal Oscillation Stop Detect Time External RC Oscillator Capacitance Internal RC Oscillator Capacitance External Ceramic Oscillator Capacitance Internal RC Oscillator Capacitance POR Voltage Non-POR Voltage BLD Judgment Voltage BLD Judgment Voltage Temperature Deviation VSTA VHOLD TSTOP Oscillation start time: within 5 seconds -- -- 3.5 3.5 0.1 -- -- -- -- -- 5.0 ms Min. 2.7 -- Typ. 3.0 -4.0 Max. 3.3 -- Unit V mV/C Measuring Circuit
1.0
1.5
2.0
1.2
--
3.3 V
1
CG
--
5
--
25
CD
-- CSA2.00MG (Murata MFG.-make) used VDDE = 3.0 V -- VDD = 6.0 V VDD = 6.0 V LD1 = 1, LD0 = 1, Ta = 25C LD1 = 1, LD0 = 0, Ta = 25C VBLDC = 5.10 V (LD1 = 1, LD0 = 1) VBLDC = 4.50 V (LD1 = 1, LD0 = 0)
20
25
30 pF
CL0, CL1
--
30
--
COS VPOR1 VPOR2 VBLDC
8 0 2.0 5.00 4.40 -- --
12 -- -- 5.10 4.50 -3.5 -2.3
16 0.7 6.0 5.20 4.60 -- mV/C --
V V --
VBLDC
Notes:
1. "TSTOP" indicates that if the crystal oscillator stops over the value of TSTOP, the system reset occurs. 2. "POR" denotes Power On Reset. 3. "VPOR1" indicates that POR occurs when VDD falls from VDD to VPOR1 and again rises up to VDD 4. "VPOR2" indicates that POR does not occur when VDD falls from VDD to VPOR2 and again rises up to VDD.
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DC Characteristics (2)
(VDD = 6.0 V, VDDI = 3.0 V, VSS = 0 V, 1/6 bias, DSPCNT = 0H, Ta = -20 to +70C unless otherwise specified)
Parameter Symbol Condition Min. Typ. Max. Unit Measuring Circuit
Supply Current 1
IDD1
CPU in HALT state, LCD is being driven, no panel load (Crystal oscillation: 32.768 kHz) (High-speed clock oscillation stopped) CPU in HALT state, LCD is being driven, no panel load (RC oscillation: ROSL = 1.5 M) (High-speed clock oscillation stopped) CPU in HALT state, LCD in Power Down mode (Crystal oscillation: 32.768 kHz) (High-speed clock oscillation stopped) CPU in HALT state, LCD in Power Down mode (RC oscillation: ROSL = 1.5 M) (High-speed clock oscillation stopped) CPU operating at low speed, LCD is being driven, no panel load (Crystal oscillation: 32.768 kHz) (High-speed clock oscillation stopped) CPU operating at low speed, LCD is being driven, no panel load (RC oscillation: ROSL = 1.5 M) (High-speed clock oscillation stopped)
Ta = -20 to +50C
--
11.0 14.5
Ta = -20 to +70C
--
11.0 19.5
Ta = -20 to +50C
--
14.5 18.0
Ta = -20 to +70C
--
14.5 23.0
Ta = -20 to +50C
--
4.0
5.0
Supply Current 2
Ta = -20 to +70C
--
4.0
6.5
IDD2
Ta = -20 to +50C
--
7.0
8.0
A
1
Ta = -20 to +70C
--
7.0
9.5
Ta = -20 to +50C
--
20.5 29.0
Ta = -20 to +70C
--
20.5 34.0
Supply Current 3
IDD3
Ta = -20 to +50C
--
24.5 33.0
Ta = -20 to +70C
-- -- --
24.5 38.0 1100 1700 1500 2000
Supply Current 4 Supply Current 5
IDD4 IDD5
CPU operating at high-speed oscillation
(1 MHz RC oscillation, ROSH = 75 k)
CPU operating at high-speed oscillation
(2 MHz ceramic oscillation)
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DC Characteristics (3)
(VDD = 3.5 to 7.2 V, VDDI = 1.8 to 5.5 V, VSS = 0 V, Ta = 25C unless otherwise specified) Parameter VDD6 Voltage VDD5 Voltage VDD4 Voltage VDD2 Voltage VDD1 Voltage Symbol VDD6 VDD5 VDD4 VDD2 VDD1 Condition 1/6 bias, 1/5 bias 1/6 bias 1/5 bias 1/6 bias 1/5 bias 1/6 bias 1/5 bias 1/6 bias 1/5 bias Min. 4.0 Typ.-0.1 Typ.-0.1 Typ.-0.1 Typ.-0.1 Typ.-0.1 Typ.-0.1 Typ.-0.1 Typ.-0.1 Typ. 4.1 5/6 x VDD6 4/5 x VDD6 4/6 x VDD6 3/5 x VDD6 2/6 x VDD6 2/5 x VDD6 1/6 x VDD6 1/5 x VDD6 Max. 4.2 Typ.+0.1 Typ.+0.1 Typ.+0.1 Typ.+0.1 Typ.+0.1 Typ.+0.1 Typ.+0.1 Typ.+0.1 V 1 Unit Measuring Circuit
Note: "VDD6" changes in the range from 4.10 to 6.14 V (Typ. value) according to the value of Display Contrast register (DSPCNT).
(VDD = 3.5 to 7.2 V, VDDI = 1.8 to 5.5 V, VSS = 0 V, Ta = -20 to +70C unless otherwise specified) Parameter VDDE Voltage Temperature Deviation VDD6 Voltage VDD5 Voltage VDD4 Voltage VDD2 Voltage VDD1 Voltage Symbol VDDE VDD6 VDD5 VDD4 VDD2 VDD1 Condition Min. Typ. Max. Unit Measuring Circuit
-- 1/6 bias, 1/5 bias 1/6 bias 1/5 bias 1/6 bias 1/5 bias 1/6 bias 1/5 bias 1/6 bias 1/5 bias
-- 3.6 Typ.-0.5 Typ.-0.5 Typ.-0.5 Typ.-0.5 Typ.-0.5 Typ.-0.5 Typ.-0.5 Typ.-0.5
-4.0 4.1 5/6 x VDD6 4/5 x VDD6 4/6 x VDD6 3/5 x VDD6 2/6 x VDD6 2/5 x VDD6 1/6 x VDD6 1/5 x VDD6
-- 4.6 Typ.+0.5 Typ.+0.5 Typ.+0.5 Typ.+0.5 Typ.+0.5 Typ.+0.5 Typ.+0.5 Typ.+0.5
mV/C
1 V
Note: "VDD6" changes in the range from 4.10 to 6.14 V (Typ. value) according to the value of Display Contrast register (DSPCNT).
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* Contrast voltage (VDD6 voltage)
Ta = 25C, VDD6 = 4.1 V (Typ.) DSPCNT CN0 to CN3 0H 1H 2H 3H 4H 5H 6H 7H 8H 9H 0AH 0BH 0CH 0DH 0EH 0FH CN3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 CN2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 CN1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 CN0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Min. -- Typ.-0.1 Typ.-0.1 Typ.-0.1 Typ.-0.1 Typ.-0.1 Typ.-0.1 Typ.-0.1 Typ.-0.1 Typ.-0.1 Typ.-0.1 Typ.-0.1 Typ.-0.1 Typ.-0.1 Typ.-0.1 Typ.-0.1 VDD6 Voltage (V) Typ. 4.1 4.2 4.3 4.4 4.5 4.62 4.74 4.86 5.00 5.14 5.29 5.44 5.60 5.77 5.95 6.14 Max. -- Typ.+0.1 Typ.+0.1 Typ.+0.1 Typ.+0.1 Typ.+0.1 Typ.+0.1 Typ.+0.1 Typ.+0.1 Typ.+0.1 Typ.+0.1 Typ.+0.1 Typ.+0.1 Typ.+0.1 Typ.+0.1 Typ.+0.1 Dark Display Contrast Light
Ta = 25C, VDD6 = 4.0 V (Min.) DSPCNT CN0 to CN3 0H 1H 2H 3H 4H 5H 6H 7H 8H 9H 0AH 0BH 0CH 0DH 0EH 0FH CN3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 CN2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 CN1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 CN0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Min. -- Typ.-0.1 Typ.-0.1 Typ.-0.1 Typ.-0.1 Typ.-0.1 Typ.-0.1 Typ.-0.1 Typ.-0.1 Typ.-0.1 Typ.-0.1 Typ.-0.1 Typ.-0.1 Typ.-0.1 Typ.-0.1 Typ.-0.1 VDD6 Voltage (V) Typ. 4.0 4.1 4.2 4.3 4.4 4.52 4.64 4.76 4.90 5.04 5.19 5.34 5.50 5.67 5.85 6.04 Max. -- Typ.+0.1 Typ.+0.1 Typ.+0.1 Typ.+0.1 Typ.+0.1 Typ.+0.1 Typ.+0.1 Typ.+0.1 Typ.+0.1 Typ.+0.1 Typ.+0.1 Typ.+0.1 Typ.+0.1 Typ.+0.1 Typ.+0.1 Dark Display Contrast Light
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ML63295A
* Contrast voltage (VDD6 voltage)
Ta = 25C, VDD6 = 4.2 V (Max.) DSPCNT CN0 to CN3 0H 1H 2H 3H 4H 5H 6H 7H 8H 9H 0AH 0BH 0CH 0DH 0EH 0FH CN3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 CN2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 CN1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 CN0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Min. -- Typ.-0.1 Typ.-0.1 Typ.-0.1 Typ.-0.1 Typ.-0.1 Typ.-0.1 Typ.-0.1 Typ.-0.1 Typ.-0.1 Typ.-0.1 Typ.-0.1 Typ.-0.1 Typ.-0.1 Typ.-0.1 Typ.-0.1 VDD6 Voltage (V) Typ. 4.2 4.3 4.4 4.5 4.6 4.72 4.84 4.96 5.10 5.24 5.39 5.54 5.70 5.87 6.05 6.24 Max. -- Typ.+0.1 Typ.+0.1 Typ.+0.1 Typ.+0.1 Typ.+0.1 Typ.+0.1 Typ.+0.1 Typ.+0.1 Typ.+0.1 Typ.+0.1 Typ.+0.1 Typ.+0.1 Typ.+0.1 Typ.+0.1 Typ.+0.1 Dark Display Contrast Light
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DC Characteristics (4)
(VDD = 6.0 V, VDDI = VDDE = 3.0 V, VDD1 = 1.0 V, VDD2 = 2.0 V, VDD3 = 3.0 V, VDD4 = 4.0 V, VDD5 = 5.0 V, VDD6 = 6.0 V, Ta = -20 to +70C unless otherwise specified) Parameter Output Current 1 (P2.0 to P2.3) ... (PC.0 to PC.3) (PE.0 to PE.3) Output Current 2 (MD, MDB) Symbol Condition VDDI = 3.0 V VDDI = 5.0 V VDDI = 3.0 V VDDI = 5.0 V IOH2 IOL2 IOH3 IOHM3 IOHM3S Output Current 3 (SEG0 to SEG95) (COM1 to COM32) IOMH3 IOMH3S IOML3 IOML3S IOLM3 IOLM3S IOL3 IOH4R IOL4R IOH4C IOL4C Output Leakage Current (P2.0 to P2.3) ... (PC.0 to PC.3) (PE.0 to PE.3) VOH2 = VDDE - 0.7 V VOL2 = 0.7 V VDDE = 3.0 V VDDE = 3.0 V Min. -6.0 -8.5 1.0 1.5 -11.0 2.0 -- 4 -- 4 -- 4 -- 4 -- 4 -2.50 0.25 -300 60 Typ. -3.5 -5.0 3.0 3.7 -6.0 5.5 -- -- -- -- -- -- -- -- -- -- -1.30 1.50 -120 120 Max. -1.0 -1.5 6.0 mA 8.5 -2.0 11.0 -4 -- -4 -- -4 -- -4 -- -4 -- -0.25 mA VDDE = 3.0 V VDDE = 3.0 V VDDE = 3.0 V 2.50 -60 300 A 2 A Unit Measuring Circuit
IOH1
VOH1 = VDDI - 0.5 V
IOL1
VOL1 = 0.5 V
VOH3 = VDD6 - 0.2 V (VDD6 level) VOHM3 = VDD5 + 0.2 V (VDD5 level) VOHM3S = VDD5 - 0.2 V (VDD5 level) VOMH3 = VDD4 + 0.2 V (VDD4 level) VOMH3S = VDD4 - 0.2 V (VDD4 level) VOML3 = VDD2 + 0.2 V (VDD2 level) VOML3S = VDD2 - 0.2 V (VDD2 level) VOLM3 = VDD1 + 0.2 V (VDD1 level) VOLM3S = VDD1 - 0.2 V (VDD1 level) VOL3 = VSS + 0.2 V (VSS level) VOH4R = VDDE - 0.5 V (RC oscillation) VOL4R = 0.5 V (RC oscillation) VOH4C = VDDE - 0.5 V (ceramic oscillation) VOL4C = 0.5 V (ceramic oscillation) VOH = VDDI VDDE = 3.0 V
Output Current 4 (OSC1)
IOOH
--
--
0.3
IOOL
VOL = VSS
-0.3
--
--
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ML63295A
DC Characteristics (5)
(VDD = 6.0 V, VDDI = VDDE = 3.0 V, VDD1 = 1.0 V, VDD2 = 2.0 V, VDD3 = 3.0 V, VDD4 = 4.0 V, VDD5 = 5.0 V, VDD6 = 6.0 V, Ta = -20 to +70C unless otherwise specified) Parameter Input Current 1 (P0.0 to P0.3) (P1.0 to P1.3) (P8.0 to P8.3) ... (PC.0 to PC.3) (PE.0 to PE.3) Symbol Condition VIH1 = VDDI (when pulled down) VIL1 = VSS (when pulled up) VDDI = 3.0 V VDDI = 5.0 V VDDI = 3.0 V VDDI = 5.0 V Min. 10 20 -40 -120 0 -1.0 -350 0 -1.0 0.1 -1.0 40 -1.0 VDD = 6.0 V 4.0 -1.0 Typ. 20 60 -20 -60 -- -- -170 -- -- 0.5 -0.5 60 -- 12.0 -- Max. 40 120 -10 -20 1.0 0 -30 1.0 0 1.0 -0.1 150 0 16.0 0 mA A A 3 Unit Measuring Circuit
IIH1 IIL1 IIH1Z IIL1Z IIL2
VIH1 = VDDI (in a high impedance state) VIL1 = VSS (in a high impedance state) VIL2 = VSS (when pulled up) VDDE = 3.0 V
Input Current 2 (OSC0)
IIH2R IIL2R IIH2C IIL2C IIH3 IIL3 IIH4 IIL4
VIH2R = VDDE (RC oscillation) VIL2R = VSS (RC oscillation) VIH2R = VDDE (ceramic oscillation) VIL2R = VSS (ceramic oscillation) VIH3 = VDD VIL3 = VSS VIH4 = VDD VIL4 = VSS VDD = 6.0 V
Input Current 3 (RESET) Input Current 4 (TST1, TST2)
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DC Characteristics (6)
(VDD = 6.0 V, VDDI = VDDE = 3.0 V, VDD1 = 1.0 V, VDD2 = 2.0 V, VDD3 = 3.0 V, VDD4 = 4.0 V, VDD5 = 5.0 V, VDD6 = 6.0 V, Ta = -20 to +70C unless otherwise specified) Parameter Symbol Condition Min. Typ. Max. Unit Measuring Circuit
Input Voltage 1 (P0.0 to P0.3) (P1.0 to P1.3) (P8.0 to P8.3) ... (PC.0 to PC.3) (PE.0 to PE.3) Input Voltage 2 (OSC0) Input Voltage 3 (RESET, TST1, TST2) Hysteresis Width 1 (P0.0 to P0.3) (P1.0 to P1.3) (P8.0 to P8.3) ... (PC.0 to PC.3) (PE.0 to PE.3) Hysteresis Width 2 (RESET, TST1, TST2) Input Pin Capacitance (P0.0 to P0.3) (P1.0 to P1.3) (P8.0 to P8.3) (PC.0 to PC.3) (PE.0 to PE.3) ...
VDDI = 3.0 V VIH1 VDDI = 5.0 V VDDI = 3.0 V VIL1 VDDI = 5.0 V VIH2 VIL2 VIH3 VIL3 VDDE = 3.0 V VDD = 6.0 V
2.3 3.8 0 0 2.4 0 4.8 0 0.2
-- -- -- -- -- -- -- -- 0.5
3.0 5.0 0.7 1.2 3.0 0.6 6.0 1.2 1.0 V 4
VDDI = 3.0 V VT1 VDDI = 5.0 V
0.25
1.00
1.50
VT2
VDD = 5.0 V
0.25
1.00
1.50
CIN
--
--
--
5
pF
--
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ML63295A
Measuring circuit 1
3 (*2) XT1 VDDX1 VDDX2 VDDX3 VDDX4 4 CX1 CX23 CX4
XT0 C1 C12 1 (*1) 2 OSC1 VSS VDD VDDE VDDI VDD1 Ca V V VDD2 Cb V VDD3 Cc VDD4 Cd V VDD5 Ce V VDD6 Cf V C2 OSC0
VDDL CI
A CXE
V
CX1, CX23, CX4, CXE Ca, Cb, Cc, Cd, Ce, Cf, C12 Cl CG CL0 CL1 Ceramic resonator
: 1.0 F : 1.0 F : 0.1 F : 15 pF : 30 pF : 30 pF : CSA2.00MG (2 MHz) : CSB1000J (1 MHz) (Murata MFG-.make)
*1 RC Oscillator 1 ROSH 2
*2 RC Oscillator 3 ROSL 4
Ceramic Oscillator CL0 1 Ceramic resonator 2 CL1
Crystal Oscillator CG 3 4 32.768 kHz crystal
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Measuring circuit 2
VIH *4
*3
INPUT
OUTPUT
A
VIL
VSS
VDD
VDDE
VDDI
VDD1
VDD2
VDD4
VDD5
VDD6
VDDL
*3 Input logic circuit to determine the specified measuring conditions. *4 Measured at the specified output pins.
Measuring circuit 3
*5
A
INPUT
OUTPUT
VSS
VDD
VDDE VDDI
VDD1
VDD2
VDD4
VDD5
VDD6
VDDL
Measuring circuit 4
VIH
*5
INPUT
OUTPUT
Waveform Monitoring
VIL
VSS
VDD
VDDE VDDI
VDD1
VDD2
VDD4
VDD5
VDD6
VDDL
*5 Measured at the specified input pins.
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Semiconductor 1
ML63295A
AC Characteristics (Serial Interface, Serial Port) (1) Synchronous Communication
(VDD = 3.5 to 7.2 V,VSS = 0 V, VDDI = 5.0 V, Ta = -20 to +70C unless otherwise specified) Parameter TXC/RXC Input Fall Time TXC/RXC Input Rise Time TXC/RXC Input "L" Level Pulse Width TXC/RXC Input "H" Level Pulse Width TXC/RXC Input Cycle Time TXC/RXC Output Cycle Time TXD Output Delay Time RXD Input Setup Time RXD Input Hold Time Symbol tf tr tCWL tCWH tCYC tCYC1 (O) tCYC2 (O) tDDR tDS tDH Condition -- -- -- -- -- CPU operating at 32.768 kHz CPU operating at 2 MHz Output load capacitance 10 pF -- -- Min. -- -- 0.8 0.8 2.0 -- -- -- 0.5 0.8 Typ. -- -- -- -- -- 30.5 0.5 -- -- -- Max. 1.0 1.0 -- -- -- -- -- 0.4 -- -- s Unit
Synchronous communication timing ("H" level = 4.0 V, "L" level = 1.0 V)
tCYC TXC (PC.1)/ RXC (PC.2) tr tCWH tDDR TXD (PC.3) VSS tDS RXD (PC.0) VSS tDH tDS VDDI tDDR VDDI tf tCWL VDDI VSS
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FEDL63295A-02
Semiconductor 1
ML63295A
(2) UART Communication
Parameter Transmit Baud Rate Receive Baud Rate Symbol TBRT RBRT Condition TBRT = 1/fBRT TCR = 1/fOSC RBRT = 1/fBRT Min. TBRT - TCR RBRT x 0.97 Typ. TBRT RBRT Max. TBRT + TCR RBRT x 1.03 Unit s
fBRT: Baud rates (1200, 2400, 4800, 9600 bps)
UART communication timing ("H" level = 4.0 V, "L" level = 1.0 V)
TBRT VDDI TXD (PC.3) VSS RBRT VDDI RXD (PC.0) VSS
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FEDL63295A-02
Semiconductor 1
ML63295A
AC Characteristics (Serial Interface, Shift Register)
(VDD = 3.5 to 7.2 V, VDDI = 5.0 V, VSS = 0 V, Ta = -20 to +70C unless otherwise specified) Parameter SCLK Input Fall Time SCLK Input Rise Time SCLK Input "L" Level Pulse Width SCLK Input "H" Level Pulse Width SCLK Input Cycle Time SCLK Output Cycle Time SOUT Output Delay Time SIN Input Setup Time SIN Input Hold Time Symbol tf tr tCWL tCWH tCYC tCYC1(O) tCYC2(O) tDDR tDS tDH Condition -- -- -- -- VDDI = VDDE to 5.5 V CPU operating at 32.768 kHz CPU operating at 2 MHz Output load capacitance 10 pF -- -- Min. -- -- 0.8 0.8 1.8 -- -- -- 0.5 0.8 Typ. -- -- -- -- -- 30.5 0.5 -- -- -- Max. 1.0 1.0 -- -- -- -- -- 0.4 -- -- s Unit
AC characteristics timing ("H" level = 4.0 V, "L" level = 1.0 V)
tCYC SCLK (PE.2) tr tCWH tDDR SOUT (PE.1) VSS tDS SIN (PE.0) VSS tDH tDS VDDI tDDR VDDI tf tCWL VDDI VSS
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FEDL63295A-02
Semiconductor 1
ML63295A
AC Characteristics (External Memory Interface)
(VDD = 3.5 to 7.2 V, VSS = 0 V, VDDI = 5.0 V, Ta = -20 to +70C unless otherwise specified)
(1)
For Reading from External Memory (a) When the CPU operates at 32.768 kHz
Parameter Symbol tRC tOE tOHA tDO Condition -- -- -- -- Min. -- -- -- -- Typ. 61.0 -- -- -- Max. -- 5.0 5.0 5.0 s Unit
Read Cycle Time RD Output Delay Time Output Enable Time External Memory Output Delay Time
(b) When the CPU operates at 2 MHz (VDD = 3.5 to 7.2 V)
Parameter Read Cycle Time RD Output Delay Time Output Enable Time External Memory Output Delay Time Symbol tRC tOE tOHA tDO Condition -- -- -- -- Min. 1.0 -- -- -- Typ. -- -- -- -- Max. -- 100 100 150 ns Unit s
AC characteristics timing ("H" level = 4.0 V, "L" level = 1.0 V)
MOVXB obj, xadr16 MOVXB obj, [RA] S1 System clock tRC P7 to P4 (A15 to A0) P8.0 (RD) tOE PA, P9 (D7 to D0) tOHA VDDI Port set value Input data tDO Port set value VSS Port set value Address output Port set value VDDI VSS VDDI VSS S2 S1 S2 S1 S2
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FEDL63295A-02
Semiconductor 1
ML63295A
(2)
For Writing to External Memory (a) When the CPU operates at 32.768 kHz
Parameter Symbol tWC tAS tW tWR tDS tDH Condition -- -- -- -- -- -- Min. -- -- -- -- -- -- Typ. 61.0 30.5 15.3 15.3 45.8 15.3 Max. -- -- -- -- -- -- s Unit
Write Cycle Time Address Setup Time Write Time Write Recovery Time Data Setup Time Data Hold Time
(b) When the CPU operates at 2 MHz (VDD = 3.5 to 7.2 V)
Parameter Write Cycle Time Address Setup Time Write Time Write Recovery Time Data Setup Time Data Hold Time Symbol tWC tAS tW tWR tDS tDH Condition -- -- -- -- -- -- Min. 1.0 0.4 0.2 0.2 0.7 0.2 Typ. -- -- -- -- -- -- Max. -- -- -- -- -- -- s Unit
AC characteristics timing ("H" level = 4.0 V, "L" level = 1.0 V)
MOVXB [RA], obj MOVXB xadr16, obj S1 System clock tWC P7 to P4 (A15 to A0) VDDI Port set value Address output Port set value VSS VDDI Port set value Output data tDS P8.1 (WR) tAS tW Port set value tDH VSS VDDI tWR VSS S2 S1 S2 S1 S2
PA, P9 (D7 to D0)
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FEDL63295A-02
Semiconductor 1
ML63295A
PACKAGE DIMENSIONS
(Unit: mm)
QFP240-P-3232-0.50-BK4
Mirror finish
5
Notes for Mounting the Surface Mount Type Package
Package material Lead frame material Pin treatment Package weight (g) Rev. No./Last Revised
Epoxy resin Cu alloy Solder plating (5m) 7.82 TYP. 2/Nov. 28, 1996
The surface mount type packages are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki's responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times).
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FEDL63295A-02
Semiconductor 1
ML63295A
NOTICE 1. The information contained herein can change without notice owing to product and/or technical improvements. Before using the product, please make sure that the information being referred to is up-to-date. 2. The outline of action and examples for application circuits described herein have been chosen as an explanation for the standard action and performance of the product. When planning to use the product, please ensure that the external conditions are reflected in the actual circuit, assembly, and program designs. When designing your product, please use our product below the specified maximum ratings and within the specified operating ranges including, but not limited to, operating voltage, power dissipation, and operating temperature. Oki assumes no responsibility or liability whatsoever for any failure or unusual or unexpected operation resulting from misuse, neglect, improper installation, repair, alteration or accident, improper handling, or unusual physical or electrical stress including, but not limited to, exposure to parameters beyond the specified maximum ratings or operation outside the specified operating range. Neither indemnity against nor license of a third party's industrial and intellectual property right, etc. is granted by us in connection with the use of the product and/or the information and drawings contained herein. No responsibility is assumed by us for any infringement of a third party's right which may result from the use thereof. The products listed in this document are intended for use in general electronics equipment for commercial applications (e.g., office automation, communication equipment, measurement equipment, consumer electronics, etc.). These products are not authorized for use in any system or application that requires special or enhanced quality and reliability characteristics nor in any system or application where the failure of such system or application may result in the loss or damage of property, or death or injury to humans. Such applications include, but are not limited to, traffic and automotive equipment, safety devices, aerospace equipment, nuclear power control, medical equipment, and life-support systems. Certain products in this document may need government approval before they can be exported to particular countries. The purchaser assumes the responsibility of determining the legality of export of these products and will take appropriate and necessary steps at their own expense for these. No part of the contents contained herein may be reprinted or reproduced without our prior permission. Copyright 2001 Oki Electric Industry Co., Ltd.
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